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A PLI based power calculation tool for
Verilog designers


VeriPower is a PLI based power calculation tool for Verilog1 designers, targeted at users who want a fast but very accurate look at the power consumed by their design while running a Verilog simulation. This tool includes:

Major Features:

Total power and node power: VeriPower uses PLI routines to calculate power for the entire design and also the individual nodes throughout a Verilog design.
Power Calculation Interval: The time interval over which the power calculations are calculated can be defined by the user.
VeriPower output data: Data from power calculations can be viewed as tabular data in ascii text format, in your preferred HTML browser,
vpower.gif (10201 bytes) or displayed using the wave form viewer Undertow.
Easy to setup: VeriPower uses the Verilog net list for each cell in your design along with the level 1/ 3 / 28 spice technology file  Very fast, up to 50 times faster when compared with transistor level simulators.

Libraries: Use your existing libraries, or let VeriPower's library generator create libraries for you.
Very Accurate: typically within 5% accuracy of transistor level simulators.
Low Cost: VeriPower is about 1/10th the price of other popular transistor level simulation programs.
Easy to use: Your libraries can be automatically characterized in under 30 minutes using the automatic characterizer that comes with VeriPower. From then on the tool will calculate power while you are running your Verilog simulations.

DESCRIPTION

VeriPower is a powerful tool for calculating the power consumed by a Verilog design under test. This tool, with its many features, is targeted at Verilog designers who want a quick but very accurate process to determine the power consumed by their design during simulation. VeriPower provides the Verilog designer with the capability to calculate the power consumed by their design as it is running vectors during a Verilog simulation. The power of the entire design can be calculated as well as the power consumed by internal nodes.

The information that is needed in order to perform the power calculations is a Verilog net list of the cells used in this design along with the level 1/3/27/39 Spice technology file.

 

This tool is one more member, in a family of extremely powerful tools for Verilog users.  Veritools tools are being used on the world's most demanding Verilog projects including the design of the world's most powerful super computers and many of the largest and demanding ASIC designs currently done in the world.  Veritools products are available on: Sun 4.X, Solaris, HP 700/800, IBM 6000-AIX, Sony News and SGI platforms, in addition to Windows 95 and Windows NT.  One of Veritools products, Undertow, is used world wide by hundreds of companies on 4 continents and in 35 countries.  It has become the standard Verilog, TIMEMILL, POWERMILL, HSpice and Anagram viewing tool in many of the worlds largest electronic companies in the United States, Japan and Europe.

 

Undertow Suite
Undertow
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bullet.gif (859 bytes) VeriPower
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verilog2vhdl™
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Script Pool


One-Tenth The Cost Of Other Popular Power Calculators


High-Speed
Over 100 Times Faster than Other Power Calculatros


Within 3% Accuracy

 

 

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